Ghayoula, R.
FPGA Implementation of the RC4 Stream Cipher using Artix-7 - Vol.4(2), Jul-Dec - New Delhi Journals Pub 2018 - 9-14p.
The RC4 (for Rivest Cipher 4) encryption algorithm appeared in 1987. Its designer is none other than Ronald Rivest, one of the three inventors of the RSA algorithm. This algorithm is distinguished by its great simplicity and speed of encryption. The details of the algorithm were kept secret until a description, probably obtained by reverse engineering, was posted on the Cipherpunks mailing list in 1994. Speed and flexibility of RC4 algorithm are very fast, and due to these features, this stream-cipher is used in various security protocols and standards. A few hardware implementations were previously recommended in the literature with the objective of enhancing the performance, area or both. In this article, Artix-7-based RC4 stream-cipher is used for hardware implementation. Previous designs support fixed length keys, whereas the proposed system has capacity of varying length from 8 to 128 bits.
Computer Engineering
FPGA Implementation of the RC4 Stream Cipher using Artix-7 - Vol.4(2), Jul-Dec - New Delhi Journals Pub 2018 - 9-14p.
The RC4 (for Rivest Cipher 4) encryption algorithm appeared in 1987. Its designer is none other than Ronald Rivest, one of the three inventors of the RSA algorithm. This algorithm is distinguished by its great simplicity and speed of encryption. The details of the algorithm were kept secret until a description, probably obtained by reverse engineering, was posted on the Cipherpunks mailing list in 1994. Speed and flexibility of RC4 algorithm are very fast, and due to these features, this stream-cipher is used in various security protocols and standards. A few hardware implementations were previously recommended in the literature with the objective of enhancing the performance, area or both. In this article, Artix-7-based RC4 stream-cipher is used for hardware implementation. Previous designs support fixed length keys, whereas the proposed system has capacity of varying length from 8 to 128 bits.
Computer Engineering