000 -LEADER |
fixed length control field |
a |
003 - CONTROL NUMBER IDENTIFIER |
control field |
OSt |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20200116094007.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
200116b xxu||||| |||| 00| 0 eng d |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
AIKTC-KRRC |
Transcribing agency |
AIKTC-KRRC |
100 ## - MAIN ENTRY--PERSONAL NAME |
9 (RLIN) |
11756 |
Author |
Jain, Neeraj |
245 ## - TITLE STATEMENT |
Title |
Thermal stability analysis and performance exploration of asymmetrical dual-k underlap spacer (ADKUS) SOI FinFET for high performance circuit applications |
250 ## - EDITION STATEMENT |
Volume, Issue number |
Vol.57(5), May |
260 ## - PUBLICATION, DISTRIBUTION, ETC. |
Place of publication, distribution, etc. |
New Delhi |
Name of publisher, distributor, etc. |
CSIR |
Year |
2019 |
300 ## - PHYSICAL DESCRIPTION |
Pagination |
352-360p. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
This paper explores the performance of asymmetrical dual-k underlap spacer (ADKUS) SOI FinFET (device-D1) over the wide temperature range (200 K-450 K). An attempt has been made to find out the zero temperature coefficient (ZTC) biased point to enhance the digital, analog and RF performance at 20 nm channel length. The proposed device will be suitable for VLSI circuit’s design, internet of things (IoT) interfacing components and algorithm development for security applications of information technology. The potential parameters of device-D1 like intrinsic gain (AV ), output conductance (gd ), transconductance (gm ), early voltage (VEA ), off current (Ioff) , on current (Ion), Ion/Ioff ratio, gate to source capacitance (Cgs), gate to drain capacitance (Cgd), cut-off frequency (fT), energy (CV2), intrinsic delay (CV/I), energy-delay product (EDP), power dissipation (PD), sub-threshold slope (SS), Q-Factor (gm,max/SS), threshold voltage (Vth) and maximum trans-conductance (gm,max) are subjected to analyze for evaluating the performance of ADKUS SOI FinFET for wide temperature environment. The validation of a temperature based performance of ADKUS SOI FinFET gives an opportunity to design the numerous analog and digital components of internet security infrastructure at wide temperature environment. These ADKUS SOI FinFET based components give new technology to the IoT which has the ability to connect the real world with the digital world and enables the people and machines to know the status of thousands of components simultaneously |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
9 (RLIN) |
4642 |
Topical term or geographic name entry element |
Humanities and Applied Science |
700 ## - ADDED ENTRY--PERSONAL NAME |
9 (RLIN) |
11757 |
Co-Author |
Balwinder Raj |
773 0# - HOST ITEM ENTRY |
International Standard Serial Number |
0019-5596 |
Title |
Indian journal of pure & applied physics (IJPAP) |
Place, publisher, and date of publication |
New Delhi CSIR-NISCAIR |
856 ## - ELECTRONIC LOCATION AND ACCESS |
URL |
http://nopr.niscair.res.in/bitstream/123456789/47316/1/IJPAP%2057%285%29%20352-360.pdf |
Link text |
Click here |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
|
Koha item type |
Articles Abstract Database |