Design of low-power CMOS VCO with three transistors NAND gate and MOS varactor (Record no. 20790)

000 -LEADER
fixed length control field a
003 - CONTROL NUMBER IDENTIFIER
control field OSt
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240320110847.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 240320b xxu||||| |||| 00| 0 eng d
040 ## - CATALOGING SOURCE
Original cataloging agency AIKTC-KRRC
Transcribing agency AIKTC-KRRC
100 ## - MAIN ENTRY--PERSONAL NAME
9 (RLIN) 14246
Author Manoj Kumar
245 ## - TITLE STATEMENT
Title Design of low-power CMOS VCO with three transistors NAND gate and MOS varactor
250 ## - EDITION STATEMENT
Volume, Issue number Vol.104(4), Aug
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. USA
Name of publisher, distributor, etc. Springer
Year 2023
300 ## - PHYSICAL DESCRIPTION
Pagination 851-858p.
520 ## - SUMMARY, ETC.
Summary, etc. A low-power VCO circuit design with varying NMOS load and 3-transistors NAND gate and is presented. VCO circuit is designed with 180 nm gate length. Tuning of the output frequency is controlled by deviation in voltage (VCT) from 1.8 to 2.7 V. Additionally, a change in output frequency is achieved with the change in reverse bias (VSB) and drain-source biasing (VTune) of NMOS load. Three-stages VCO with power supply and drain-source voltage tuning of NMOS varactor provides frequency from 1.308 to 1.891 GHz with circuit power varying from 0.390 to 1.573 mW. By utilizing the substrate tuning of NMOS varactor load, the circuit gives frequency varying from 1.308 to 1.808 GHz. Frequency changes from 1.308 to 1.564 GHz have been obtained by changing the reverse bias of NMOS load with different source/drain biasing. The tuning range of 36, 32, and 18% has been obtained. VCO provides a phase noise of −94.33 dBc/Hz @1 MHz and figure of merit (FoM) for the VCO is 160.74 dBc/Hz. The reported VCO circuit provides an improved output frequency range with reduced power consumption.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
9 (RLIN) 4642
Topical term or geographic name entry element Humanities and Applied Sciences
773 0# - HOST ITEM ENTRY
International Standard Serial Number 2250-2106
Title Journal of the institution of engineers (India): Series B
856 ## - ELECTRONIC LOCATION AND ACCESS
URL https://link.springer.com/article/10.1007/s40031-023-00898-9
Link text Click here
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type Articles Abstract Database
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Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Permanent Location Current Location Shelving location Date acquired Barcode Date last seen Price effective from Koha item type
          School of Engineering & Technology School of Engineering & Technology Archieval Section 2024-03-20 2024-0311 2024-03-20 2024-03-20 Articles Abstract Database
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