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From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators [electronic resource] /

By: Rahimi, Abbas [author.].
Contributor(s): Benini, Luca [author.] | Gupta, Rajesh K [author.] | SpringerLink (Online service).
Publisher: Cham : Springer International Publishing : Imprint: Springer, 2017Edition: 1st ed. 2017.Description: XV, 197 p. 86 illus., 48 illus. in color. | Binding - Card Paper |.Content type: text Media type: computer Carrier type: online resourceISBN: 9783319537689.Subject(s): EXTC Engineering | Logic design | Circuits and Systems | Processor ArchitecturesDDC classification: 621.3815 Online resources: Click here to access eBook in Springer Nature platform. (Within Campus only.) In: Springer Nature eBookSummary: This book focuses on computing devices and their design at various levels to combat variability. The authors provide a review of key concepts with particular emphasis on timing errors caused by various variability sources. They discuss methods to predict and prevent, detect and correct, and finally conditions under which such errors can be accepted; they also consider their implications on cost, performance and quality. Coverage includes a comparative evaluation of methods for deployment across various layers of the system from circuits, architecture, to application software. These can be combined in various ways to achieve specific goals related to observability and controllability of the variability effects, providing means to achieve cross layer or hybrid resilience. · Covers challenges and opportunities in identifying microelectronic variability and the resulting errors at various layers in the system abstraction; · Enables readers to assess how various levels of circuit and system design can mitigate the effects of variability; · Demonstrates overall system architecture of what is now called “approximate computing” paradigm in massively parallel integrated architectures and accelerators.
List(s) this item appears in: Springer Nature eBooks
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This book focuses on computing devices and their design at various levels to combat variability. The authors provide a review of key concepts with particular emphasis on timing errors caused by various variability sources. They discuss methods to predict and prevent, detect and correct, and finally conditions under which such errors can be accepted; they also consider their implications on cost, performance and quality. Coverage includes a comparative evaluation of methods for deployment across various layers of the system from circuits, architecture, to application software. These can be combined in various ways to achieve specific goals related to observability and controllability of the variability effects, providing means to achieve cross layer or hybrid resilience. · Covers challenges and opportunities in identifying microelectronic variability and the resulting errors at various layers in the system abstraction; · Enables readers to assess how various levels of circuit and system design can mitigate the effects of variability; · Demonstrates overall system architecture of what is now called “approximate computing” paradigm in massively parallel integrated architectures and accelerators.

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