Hardware schemes for autonomous navigation of cooperative-type multi-robot in indoor environment
By: Divya Vani, G.
Contributor(s): Karumuri, Srinivasa Rao.
Publisher: New York Springer 2022Edition: Vol.103(2), Apr.Description: 449-460p.Subject(s): Humanities and Applied SciencesOnline resources: Click here In: Journal of the institution of engineers (India): Series BSummary: This study proposes about the autonomous navigation of a multi-robot for transportation in indoor environments. This transportation is integrated with three foldings of VLSI architectures; they are 1) shortest optimal path planning 2) behavioral control between multi-robot with leadership swapping methods as per dynamic conditions and 3) obstacle avoidance by multi-robot. The hardware schemes have been designed for navigation of multi-robot with shortest path planning, based on an extended Dijkstra algorithm along with the Delaunay triangulation method. The behavioral control mechanism between the multi-robot is another challenge at the time of navigation and obstacle avoidance at both static and dynamic conditions in real-time scenario. The leader and follower approaches are deployed for cooperation between multi-robot to accomplish the task. The VLSI architectures are proposed for multi-robot navigation in the warehouse-type indoor environment. It is developed using Verilog HDL, simulated and synthesized with Xilinx Vivado 17.1. The Zynq-7000 SoC ZC702 FPGA is used as the target device.Item type | Current location | Call number | Status | Date due | Barcode | Item holds |
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Articles Abstract Database | School of Engineering & Technology Archieval Section | Not for loan | 2022-1611 |
This study proposes about the autonomous navigation of a multi-robot for transportation in indoor environments. This transportation is integrated with three foldings of VLSI architectures; they are 1) shortest optimal path planning 2) behavioral control between multi-robot with leadership swapping methods as per dynamic conditions and 3) obstacle avoidance by multi-robot. The hardware schemes have been designed for navigation of multi-robot with shortest path planning, based on an extended Dijkstra algorithm along with the Delaunay triangulation method. The behavioral control mechanism between the multi-robot is another challenge at the time of navigation and obstacle avoidance at both static and dynamic conditions in real-time scenario. The leader and follower approaches are deployed for cooperation between multi-robot to accomplish the task. The VLSI architectures are proposed for multi-robot navigation in the warehouse-type indoor environment. It is developed using Verilog HDL, simulated and synthesized with Xilinx Vivado 17.1. The Zynq-7000 SoC ZC702 FPGA is used as the target device.
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