Single-Phase Two-Stage Multi-Level Inverter Employing Low Number of Switching Devices
By: Feloups, Cathrine E. S
.
Contributor(s): Essam, E. M. Mohamed.
Publisher: New Delhi Journals Pub 2019Edition: Vol.9(2), May-Aug.Description: 22-32p.Subject(s): Electrical EngineeringOnline resources: Click here
In:
Journal of power electronics and power systemsSummary: In recent years, multilevel inverter (MLI) plays a significant role in low or medium voltage applications as a result of generating voltage with reduced harmonic contents. This paper proposes a new version of multi-level inverters (MLI) with reduced switching devices along with reduced harmonics content of output voltage, which results in low switching losses compared with conventional MLI topologies. In addition, the proposed inverter provides low total blocked voltage compared with the most recent topologies; therefore, the cost of the proposed topology is reduced. Harmonics reduction is significantly based on the modulation strategy which is used to generate switching states of the switching devices. In this regard, a traditional level-shifted pulse width modulation (LS-PWM) has been used. A passive filter is used to reduce harmonics content of the load output voltage. The load output voltage is changed to establish a desired value according to a change in modulation index. The overall system with seven-level topology is validated with a laboratory prototype and it is tested at different types of loads. The proposed inverter offers better operation with good efficiency owing to the lower number of components and low harmonics content in output voltage before and after filtering.
Keywords: LS-PWM, multi-level inverter, seven-level, total blocked voltage, total harmonic distortion
| Item type | Current location | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|
Articles Abstract Database
|
School of Engineering & Technology Archieval Section | Not for loan | 2020064 |
In recent years, multilevel inverter (MLI) plays a significant role in low or medium voltage applications as a result of generating voltage with reduced harmonic contents. This paper proposes a new version of multi-level inverters (MLI) with reduced switching devices along with reduced harmonics content of output voltage, which results in low switching losses compared with conventional MLI topologies. In addition, the proposed inverter provides low total blocked voltage compared with the most recent topologies; therefore, the cost of the proposed topology is reduced. Harmonics reduction is significantly based on the modulation strategy which is used to generate switching states of the switching devices. In this regard, a traditional level-shifted pulse width modulation (LS-PWM) has been used. A passive filter is used to reduce harmonics content of the load output voltage. The load output voltage is changed to establish a desired value according to a change in modulation index. The overall system with seven-level topology is validated with a laboratory prototype and it is tested at different types of loads. The proposed inverter offers better operation with good efficiency owing to the lower number of components and low harmonics content in output voltage before and after filtering.
Keywords: LS-PWM, multi-level inverter, seven-level, total blocked voltage, total harmonic distortion
Click on an image to view it in the image viewer
There are no comments for this item.