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Design and development of multifunction frequency relay on FPGA

By: Varun Maheshwari.
Contributor(s): Jain, Akanksha.
Publisher: New York Springer 2022Edition: Vol.103(2), Apr.Description: 395-404p.Subject(s): Humanities and Applied SciencesOnline resources: Clik here In: Journal of the institution of engineers (India): Series BSummary: Frequency in power system is major parameter which shows the balance between power generation and consumption. If load exceeds the generation, frequency decreases and if load lack the generation minus losses, frequency increases. Underfrequency and overfrequency relays are first line of defense in power system that detects these abnormal conditions of power system and initiates corrective action as quickly as possible in order to maintain the power system in its normal and stable state. Microprocessor/microcontroller-based frequency relays are preferred over solid-state relays due to their programming approach; however, these relays are sequential in nature. The consecutive application of these tasks results in enhance the computational time and destructively affect the overall performance of the relay. In this paper concurrent architecture-based multifunction frequency relay, i.e., underfrequency and overfrequency are implemented on GENESYS XILINX VIRTEX-5 XC5VLX50T FPGA board with help of IP (Intellectual Properties) cores in VHDL. Proposed relay works on concurrent sense-process-communicated cycles. Test results are obtained with help of HONALEC 360 km 400 kV Transmission Line Hardware Simulator and commutated to serially/IP communication facility.
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Frequency in power system is major parameter which shows the balance between power generation and consumption. If load exceeds the generation, frequency decreases and if load lack the generation minus losses, frequency increases. Underfrequency and overfrequency relays are first line of defense in power system that detects these abnormal conditions of power system and initiates corrective action as quickly as possible in order to maintain the power system in its normal and stable state. Microprocessor/microcontroller-based frequency relays are preferred over solid-state relays due to their programming approach; however, these relays are sequential in nature. The consecutive application of these tasks results in enhance the computational time and destructively affect the overall performance of the relay. In this paper concurrent architecture-based multifunction frequency relay, i.e., underfrequency and overfrequency are implemented on GENESYS XILINX VIRTEX-5 XC5VLX50T FPGA board with help of IP (Intellectual Properties) cores in VHDL. Proposed relay works on concurrent sense-process-communicated cycles. Test results are obtained with help of HONALEC 360 km 400 kV Transmission Line Hardware Simulator and commutated to serially/IP communication facility.

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