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New third-order quadrature sinusoidal oscillator employing current differencing buffered amplifiers.

By: Komal.
Contributor(s): Kumar, Ramnish.
Publisher: Tenalgana IUP Publications 2022Edition: Vol.15(4), Oct.Description: 21-42p.Subject(s): Electrical EngineeringOnline resources: Click here In: IUP journal of electrical and electronics engineeringSummary: The paper presents a Voltage Mode (VM) Third-Order Quadrature Sinusoidal Oscillator (TOQSO) using Current Differencing Buffered Amplifiers (CDBA). The proposed TOQSO is designed using two CDBAs, four resistors and three Grounded Capacitors (GCs). The circuit is suitable for integrated circuit realization as all the capacitors are grounded. The Condition of Oscillation (CO) and Frequency of Oscillation (FO) of the presented circuit are self-regulating, i.e., CO can be regulated by resistor and capacitor, and the FO can be tuned. Non-ideal analysis is carried out, and the results are compared with ideal ones. Sensitivities of FO with respect to active and passive components are evaluated and found to be less and low Total Harmonic Distortion (THD). The presented configuration has power dissipation 1.01 mW at ±0.9 V supply voltages. The feasibility of the presented circuit is validated using CMOS CDBA with supply voltage ±0.9 V.
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The paper presents a Voltage Mode (VM) Third-Order Quadrature Sinusoidal Oscillator (TOQSO) using Current Differencing Buffered Amplifiers (CDBA). The proposed TOQSO is designed using two CDBAs, four resistors and three Grounded Capacitors (GCs). The circuit is suitable for integrated circuit realization as all the capacitors are grounded. The Condition of Oscillation (CO) and Frequency of Oscillation (FO) of the presented circuit are self-regulating, i.e., CO can be regulated by resistor and capacitor, and the FO can be tuned. Non-ideal analysis is carried out, and the results are compared with ideal ones. Sensitivities of FO with respect to active and passive components are evaluated and found to be less and low Total Harmonic Distortion (THD). The presented configuration has power dissipation 1.01 mW at ±0.9 V supply voltages. The feasibility of the presented circuit is validated using CMOS CDBA with supply voltage ±0.9 V.

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