Design of a radiation-hardened sram cell using 16nm technology node (Record no. 17268)
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| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220805164018.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 220805b xxu||||| |||| 00| 0 eng d |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | AIKTC-KRRC |
| Transcribing agency | AIKTC-KRRC |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| 9 (RLIN) | 17494 |
| Author | Rajat M. |
| 245 ## - TITLE STATEMENT | |
| Title | Design of a radiation-hardened sram cell using 16nm technology node |
| 250 ## - EDITION STATEMENT | |
| Volume, Issue number | Vol.12 Issue 3, May-Jun. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Gurugram |
| Year | 2022 |
| Name of publisher, distributor, etc. | IOSR - International Organization of Scientific Research |
| 300 ## - PHYSICAL DESCRIPTION | |
| Pagination | 08-15p. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | <br/>ABSTRACT: Electronic circuits are exposed to very high energy radiation in the harsh conditions of outer space. This leads to soft errors such as single-event upsets (SEU), double-event upsets (DEU) and single-event transients (SET). The memory circuits are the most susceptible to these soft errors resulting in severe data loss. This paper proposes the design for an SRAM cell that is radiation hardened by design (RHBD). A comparative study of the standard SRAM cell and the RHBD SRAM cell indicates that the proposed design is resilient to SEUs and DEUs. The proposed design is an improvement on the 8T SRAM cell design and includes a 20T triple interlocked cell (TICE) design. The error correction capabilities of both designs are compared by manually injecting bit upsets at crucial nodes in the circuit. It is observed that the TICE design provides a 96.75% and 98.5% improvement over.........<br/><br/>Keywords— DEU; Radiation Hardening; RHBD; SET; SEU; DEU; SRAM<br/> |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| 9 (RLIN) | 4622 |
| Topical term or geographic name entry element | Computer Engineering |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| 9 (RLIN) | 17495 |
| Co-Author | Ram Rathan K.R. |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| 9 (RLIN) | 17496 |
| Co-Author | Ranjithkumar N. |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| 9 (RLIN) | 17497 |
| Co-Author | Bellubbi, Ravi L. |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| 9 (RLIN) | 17498 |
| Co-Author | Jamuna S. |
| 773 0# - HOST ITEM ENTRY | |
| Place, publisher, and date of publication | Gurgaon International Organization Of Scientific Research (IOSR) |
| International Standard Serial Number | 2319 – 4197 |
| Title | IOSR journal of VLSI and signal processing (IOSR-JVSP) |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Articles Abstract Database |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Date acquired | Total Checkouts | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | Reference | School of Engineering & Technology | School of Engineering & Technology | Archieval Section | 05/08/2022 | 2022-1289 | 05/08/2022 | 05/08/2022 | Articles Abstract Database |