Verification of serial peripheral interface (SPI) and inter- integrated circuit (I2C) protocols
Publication details: Haryana IOSR - International Organization of Scientific Research 2024Edition: Vol.14(5), Sep-OctDescription: 21-28pSubject(s): Online resources: In: IOSR journal of VLSI and signal processing (IOSR-JVSP)Summary: The Serial Peripheral Interface (SPI) and Inter-Integrated Circuit (I2C) protocols are widely used for communication between microcontrollers, sensors, and other digital devices. The correctness and reliability of these protocols are essential for proper system functioning. Therefore, it is necessary to verify these protocols thoroughly to ensure that they are error-free. In this paper, a novel verification environment is proposed for the verification of SPI and I2C protocols using SystemVerilog. Since, SystemVerilog incorporates Object oriented Programming (OOPs) concept in Verilog programming language, stimulus generation and its application to the DUT are done at higher abstraction level. Further, the proposed approach involves creating verification environments using the Universal Verification Methodology (UVM) framework and verifying the protocols' functionality and performance.| Item type | Current library | Status | Barcode | |
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School of Engineering & Technology Archieval Section | Not for loan | 2025-0507 |
The Serial Peripheral Interface (SPI) and Inter-Integrated Circuit (I2C) protocols are widely used for
communication between microcontrollers, sensors, and other digital devices. The correctness and reliability of
these protocols are essential for proper system functioning. Therefore, it is necessary to verify these protocols
thoroughly to ensure that they are error-free.
In this paper, a novel verification environment is proposed for the verification of SPI and I2C protocols using
SystemVerilog. Since, SystemVerilog incorporates Object oriented Programming (OOPs) concept in Verilog
programming language, stimulus generation and its application to the DUT are done at higher abstraction
level. Further, the proposed approach involves creating verification environments using the Universal
Verification Methodology (UVM) framework and verifying the protocols' functionality and performance.
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