Fundamentals of IP and SoC Security  Design, Verification, and Debug /  [electronic resource] : 

 - 1st ed. 2017. 
 - VI, 316 p. 105 illus., 52 illus. in color.  | Binding - Card Paper | 
<br/><br/> This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the “trenches” of current industrial practice in design, implementation, and validation of security-critical embedded systems. Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs; Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs;  Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security.  . 
<br/><br/><label>ISBN: </label>9783319500577 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Computer Engineering
<br/><br/><label>Subjects--Index Terms: </label>Processor Architectures. Electronic Circuits and Devices. 
<br/><br/><label>Dewey Class. No.: </label>621.3815