This design deals on standard on-chip communication protocol of AMBA APB. Today the VLSI design focuses on very complex functionality, less time-to-market and with high performance. The three main constraints in design of any digital circuit are area, speed and power. Recently most of the embedded systems use MPSOCs (multi processors system on chip) architectures. The architecture is primarily based on reusability in SoC as duplicating computing units on the same chip. It also focuses primarily on communication and synchronization between theses processors to meet the performance requirement of the complete system. The work involved is of AMBA APB protocol for communication between master (bridge) and slave. During this research paper, we main focus on the standardization of communication protocol because it ensures the easily integration of multiple cores from same or different vendors on the same SoC. The advanced microcontroller bus architecture (AMBA) is de-facto standard on-chip bus in system-on-chip (SoC) designs. APB is low bandwidth and low performance bus used to communicate the peripherals like UART, keypad, timer and other segment equipment’s to the bus architecture.