Time Domain Analysis on Chip High Speed VLSI Optical Interconnection Network (Record no. 14740)

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control field 20210320111945.0
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fixed length control field 210320b xxu||||| |||| 00| 0 eng d
040 ## - CATALOGING SOURCE
Original cataloging agency AIKTC-KRRC
Transcribing agency AIKTC-KRRC
100 ## - MAIN ENTRY--PERSONAL NAME
9 (RLIN) 10236
Author Sharma, Abhishek
245 ## - TITLE STATEMENT
Title Time Domain Analysis on Chip High Speed VLSI Optical Interconnection Network
250 ## - EDITION STATEMENT
Volume, Issue number Vol, 8(3), Sep- Dec
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. New Delhi
Name of publisher, distributor, etc. STM Journals
Year 2018
300 ## - PHYSICAL DESCRIPTION
Pagination 36-44p.
520 ## - SUMMARY, ETC.
Summary, etc. Intrachip optical interconnects (OIs) have the potential to outperform electrical wires and to ultimately, solve the communication problem, and to obtain high-performance integrated circuits. In this study, the International Technology Roadmap for Semiconductors (ITRS) is used as a reference to fulfill the requirements of silicon-based ICs must satisfy to successfully perform copper electrical interconnects (IEs).
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
9 (RLIN) 4619
Topical term or geographic name entry element EXTC Engineering
700 ## - ADDED ENTRY--PERSONAL NAME
9 (RLIN) 13791
Co-Author Sharma, Sudhir Kumar
773 0# - HOST ITEM ENTRY
International Standard Serial Number 2321–6492
Place, publisher, and date of publication Noida STM Journals
Title Journal of VLSI design tools & technology (JoVDTT)
856 ## - ELECTRONIC LOCATION AND ACCESS
URL http://engineeringjournals.stmjournals.in/index.php/JoVDTT/article/view/577
Link text Click Here
942 ## - ADDED ENTRY ELEMENTS (KOHA)
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Koha item type Articles Abstract Database
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          School of Engineering & Technology School of Engineering & Technology Archieval Section 2021-03-20 2021-2021745 2021-03-20 2021-03-20 Articles Abstract Database
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