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Review Paper: Low Power SRAM Cell using FinFET Technology

By: Mamta.
Contributor(s): Grewal, Surender Kumar.
Publisher: New Delhi STM Journals 2018Edition: Vol.8(1), Jan-Apr.Description: 43-47p.Subject(s): EXTC EngineeringOnline resources: Click here In: Journal of VLSI design tools & technology (JoVDTT)Summary: To make portable battery operated devices more efficient with low leakage current has become a major challenge with the technology scaling. As the technology is scaling, the bulk MOSFET faces various challenges which lead to increased leakage current. FinFET is the most encouraging substitute to bulk CMOS, because of the reduced short channel effect. The FinFET device based circuits portrays advantages with its better control over the device channel and reduced short channel effects, resulting in reduced leakage power. The FinFET based SRAM cell incurs the minimum power and energy dissipation. This paper presents a comparative analysis of SRAM cell between MOSFET and FinFET on the basis of leakage power, short channel effect and power consumption.
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To make portable battery operated devices more efficient with low leakage current has become a major challenge with the technology scaling. As the technology is scaling, the bulk MOSFET faces various challenges which lead to increased leakage current. FinFET is the most encouraging substitute to bulk CMOS, because of the reduced short channel effect. The FinFET device based circuits portrays advantages with its better control over the device channel and reduced short channel effects, resulting in reduced leakage power. The FinFET based SRAM cell incurs the minimum power and energy dissipation. This paper presents a comparative analysis of SRAM cell between MOSFET and FinFET on the basis of leakage power, short channel effect and power consumption.

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