Time Domain Analysis on Chip High Speed VLSI Optical Interconnection Network
By: Sharma, Abhishek
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Contributor(s): Sharma, Sudhir Kumar
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Publisher: New Delhi STM Journals 2018Edition: Vol, 8(3), Sep- Dec.Description: 36-44p.Subject(s): EXTC Engineering![](/opac-tmpl/bootstrap/images/filefind.png)
Item type | Current location | Call number | Status | Date due | Barcode | Item holds |
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School of Engineering & Technology Archieval Section | Not for loan | 2021-2021745 |
Total holds: 0
Intrachip optical interconnects (OIs) have the potential to outperform electrical wires and to ultimately, solve the communication problem, and to obtain high-performance integrated circuits. In this study, the International Technology Roadmap for Semiconductors (ITRS) is used as a reference to fulfill the requirements of silicon-based ICs must satisfy to successfully perform copper electrical interconnects (IEs).
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